Conventional digital image sensors are organized in rows and columns of pixels as shown in sensor cutaway 100 of FIG. 1. In a CMOS sensor, each pixel includes a photo diode 103 together with control elements that enable the photo diode to be precharged in preparation for exposure and then sampled after exposure. In the simple pixel shown at 101, transistor 109 is switched on to couple the cathode of the photo diode to a voltage source and thus “precharge” the cathode of the photo diode to a precharge voltage. Transistor 109 is switched off at or before the start of an exposure interval. With transistor 109 off, the cathode voltage incrementally discharges in response to photon strikes, lowering the photo diode potential, VDET, in proportion to the amount of light detected. At the conclusion of the exposure interval, access transistor 105 is switched on to enable the photo diode potential to be amplified/driven onto a column line via source follower transistor 107 and delivered to an analog-to-digital converter 111 (ADC) disposed at the edge of the pixel array. The ADC digitizes the incoming analog voltage (VSAMP) to generate a multi-bit pixel value that ranges between minimum and maximum values corresponding to no-light and saturated conditions, respectively. These precharge and sample operations are conducted for each row of image sensor 100 to recover a digitized image.
Despite their ubiquitous application in modern imaging devices, conventional CMOS image sensors suffer from a number of limitations. First, conveying analog pixel voltages to the edge of the sensor array over long, high-capacitance column lines typically requires in-pixel amplification, increasing pixel complexity and size and limiting sensor sensitivity in low-light conditions. Also, the linear relationship between photon strikes and pixel value (shown at 114) yields a relatively small dynamic range in which a pixel quickly reaches saturation under brightening conditions. Perhaps more significantly, the maximum number of detectable photon strikes (i.e., the pixel saturation point) is proportional to the capacitance of the photo diode and thus its physical size. Consequently, the photo diode footprint is dictated by the dynamic range required in a given application and does not scale with shrinking process geometries. In high-end digital cameras, like DSLRs (digital single-lens reflex) for example, the photo diode tends to be four or more micrometers at each edge in order to achieve a reasonable dynamic range, consuming an area hundreds or even thousands of times the minimum transistor size permitted by leading logic process geometries.